Evaluation Scenario Requirements

Evaluation Scenario Requirements List

• Sensor data is analysed for plausibility Sensor data (motor shaft angle) must be within the specified data range.
• Motor Control Platform fault-tolerance Motor Control Platform is fault tolerant to erroneous position sensor data (1-out-of-3, 2-out-of-3, 3-out-of-3) (IEC 61508)

V&V Methods

V&V Methods List of the methods used in this evaluation scenario

• Model-based robustness testing Use of a behaviour model to derive stimuli out of specification and apply them to a system under test to check for its resoponse and to see whether it is robust. Due to employing a model of the behaviour, the out-of-specification inputs can also come after some sequence of perfectly valid inputs, allowing the method to "go deep" before switching to robustness testing.
• Test oracle observation at runtime Assess the correctness of a behaviour of a system at runtime with respect to a given property expressed in a formal specification language.
• CPU Verification at Module Level The purpose of Central Processing Unit (CPU) verification at module level is to ensure that CPUs, which are the central part of modern cyber-physical systems, deliver their functionality correctly and as intended. CPU verification is not a single V&V method by itself, but a broad field that applies multiple general-purpose V&V methods at different levels, e.g., RTL, emulation or physical hardware.
• Model-based testing Automatically derive test cases from behavioural models of a system/component to check for correct behaviour.
• Model-based mutation testing Model-based mutation testing is a technique to automatically generated test cases from behaviour models. These test cases are generated such as to detect certain assumed faulty (i.e. "mutated") versions the specification.
• Model-Based Testing from De-Factored Behaviour Models Extend model-based testing by first de-factoring the model and then running the test strategy.
• Optimize Fault Injection Experiments Using Model-Based Mutation Testing Combine fault injection with model-based mutation testing
• Processor Integration Verification within a System-Level Digital Twin of Legacy Systems Processor Integration Verification within a System-Level Digital Twin of Legacy Systems is a method that supports determining the suitability of a new processor for a given system by the application of a digital twin.

VALU3S Framework

Evaluation Environment Type Type of environment where the method is applied. It can be more than one type of environment.(Dimension 1)

Evaluation Type Type of evaluation performed with that method. If a method is hybrid, more than one type can be selected.(Dimension 2)

Type of Component Under Evaluation Type of components that can be evaluated with that method. It can be more than one type.(Dimension 3)

Evaluation Stage The evaluation stage where the method is used.(Dimension 5)

Purpose of the Component Under Evaluation The type of purpose that can be evaluated by a method. It can be more than one type.(Dimension 6)

Type of Requirement Under Evaluation The type of requirements that a method is able to evaluate. It can be more than one type.(Dimension 7)

Evaluation Performance Indicator The type of evaluation criteria or KPI that a method is able to improve. It can be more than one type.(Dimension 8)

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