The "Radar system for ADAS" workflow tackles the need for new V&V methods and tools required due to the higher complexity of modern ADAS systems. Some challenges in the V&V process cannot be addressed with traditional methods.

One of the challenges is the necessity to include the verification and validation at system level, which should cover the design and production phase of the IC components. The system-level validation must include the interaction between the semiconductors and all the peripherals around the sensor to grant the safety and reliability of the final system.

Thus, the environmental peripherals are introduced in the designed method to test the chip on a system level and under simulated real-world conditions. To ensure reliable and valid testing, the chip-specific thresholds are defined in advance, and all relevant test setups are listed in the test manual. After the workflow is finished, the IC performance protocol highlights the IC performance.

The above-described activities lead to the various artefact inputs and one output visualized in the picture below. Overall, the programmed test environment, a test manual, predefined test parameters, a radar multi-target simulator and the system test box are the requirements for the use case.

The input artefacts in the workflow defined for this use case are used to define test cases and design a test plan for consequent and reliable test procedures following the test manual. The test plan is then executed, and deviations from the expected thresholds are highlighted. Consequently, the chip is then debugged until the performance in all test cases is appropriate. The final results are then captured in the IC performance measurement protocol.