System level validationV&V method implementation for the Validation of the IC at system level: -Test scenario to validate the interference in lab -Need to inject critical radar targets it in test bench, program 2/3 different targets to simulate critical scenario for self-interference -Capture and proceed the data for the scenario, run several times the scenario in order to characterize the repeatability of the measurement and extract any deviation. -Identify any ghost target, spurs for the tests -Link radar ghost targets to system and IC interferencehttps://repo.valu3s.eu/use-cases/radar-system-for-adas/system-level-validationhttps://repo.valu3s.eu/@@site-logo/logo_valu3s_green_transparent.png
System level validation
V&V method implementation for the Validation of the IC at system level: -Test scenario to validate the interference in lab -Need to inject critical radar targets it in test bench, program 2/3 different targets to simulate critical scenario for self-interference -Capture and proceed the data for the scenario, run several times the scenario in order to characterize the repeatability of the measurement and extract any deviation. -Identify any ghost target, spurs for the tests -Link radar ghost targets to system and IC interference